Zero latency, asynchronous, low power , low gate count FireCode FEC.
It detects and corrects 11 bits of burst errors in 2112 bits of received codeword.
RTL features:
- Encoding and decoding is performed in 0 clock cycles.
- No iterative Feedback in the pipeline
- No RAMS/ROMS used.
RTL has logic for
- Encoder
- 32 bit asynchronous CRC calculator on 2080 message bits
- Decoder
- 11-bit asynchronous CRC calculator on 2112 bits of received codeword
- 21-bit asynchronous CRC calculator on 2112 bits of received codeword
- 11 bit search engine to detect bit 0 of 11 bits where error was introduced.
Applications:
1.firecode fec clause 74 IEEE 802.3
2.High Speed Serial Communication where burst errors are predominant